Device enumeration in an optical measurement system

ABSTRACT

An exemplary system includes a processor, a wearable device comprising a plurality of slots, and a first module including a plurality of detectors and a module control circuit. The processor is configured to successively transmit, to each slot of the plurality of slots, a command to enable a respective module located in each slot. The processor is further configured to determine, based on an acknowledgment received from the module control circuit, that the first module is enabled and located in a first slot, and to successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers. The module control circuit is configured to successively place the plurality of detectors into an enumeration mode in which each detector of the plurality of detectors is assigned a different detector address identifier of the plurality of detector address identifiers.

RELATED APPLICATIONS

The present application claims priority under 35 U.S.C. § 119(e) to U.S. Provisional Patent Application No. 62/992,485, filed on Mar. 20, 2020, and to U.S. Provisional Patent Application No. 63/051,093, filed on Jul. 13, 2020. These applications are incorporated herein by reference in their respective entireties.

BACKGROUND INFORMATION

Detecting neural activity in the brain (or any other turbid medium) is useful for medical diagnostics, imaging, neuroengineering, brain-computer interfacing, and a variety of other diagnostic and consumer-related applications. For example, it may be desirable to detect neural activity in the brain of a user to determine if a particular region of the brain has been impacted by reduced blood irrigation, a hemorrhage, or any other type of damage. As another example, it may be desirable to detect neural activity in the brain of a user and computationally decode the detected neural activity into commands that can be used to control various types of consumer electronics (e.g., by controlling a cursor on a computer screen, changing channels on a television, turning lights on, etc.).

Neural activity and other attributes of the brain may be determined or inferred by measuring responses of tissue within the brain to light pulses. One technique to measure such responses is time-correlated single-photon counting (TCSPC). Time-correlated single-photon counting detects single photons and measures a time of arrival of the photons with respect to a reference signal (e.g., a light source). By repeating the light pulses, TCSPC may accumulate a sufficient number of photon events to statistically determine a histogram representing the distribution of detected photons. Based on the histogram of photon distribution, the response of tissue to light pulses may be determined in order to study the detected neural activity and/or other attributes of the brain.

A photodetector capable of detecting a single photon (i.e., a single particle of optical energy) is an example of a non-invasive detector that can be used in an optical measurement system to detect neural activity within the brain. An exemplary photodetector is implemented by a semiconductor-based single-photon avalanche diode (SPAD), which is capable of capturing individual photons with very high time-of-arrival resolution (a few tens of picoseconds).

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings illustrate various embodiments and are a part of the specification. The illustrated embodiments are merely examples and do not limit the scope of the disclosure. Throughout the drawings, identical or similar reference numbers designate identical or similar elements.

FIG. 1 shows an exemplary optical measurement system.

FIG. 2 illustrates an exemplary detector architecture.

FIG. 3 illustrates an exemplary timing diagram for performing an optical measurement operation using an optical measurement system.

FIG. 4 illustrates a graph of an exemplary temporal point spread function that may be generated by an optical measurement system in response to a light pulse.

FIG. 5 shows an exemplary non-invasive wearable brain interface system.

FIG. 6 shows an exemplary wearable module assembly.

FIGS. 7-8 show exemplary configurations of a wearable module assembly.

FIGS. 9-14 illustrate embodiments of a wearable device that includes elements of the optical measurement systems described herein.

FIG. 15 illustrates an exemplary computing device.

FIG. 16 illustrates an exemplary method.

DETAILED DESCRIPTION

Systems, circuits, and methods for device enumeration in an optical measurement system are described herein. For example, a processor and/or controller of the system may communicate with devices (e.g., modules and/or detectors) of the system via one or more shared communication buses. Further, the devices may be configured to be modular in the system and thus configured to be added, removed, replaced, relocated, etc. The systems, circuits, and methods described herein may be configured to determine, via an enumeration process, which devices are present in which locations. The systems, circuits, and methods described herein may be further configured to assign addresses to devices in an efficient manner so that components of the systems may communicate with one another via the shared communication bus. Such a device enumeration process may enable the modularity of devices in an optical measurement system, which may allow for flexibility and efficient use of resources.

These and other advantages and benefits of the present systems, circuits, and methods are described more fully herein.

FIG. 1 shows an exemplary optical measurement system 100 configured to perform an optical measurement operation with respect to a body 102. Optical measurement system 100 may, in some examples, be portable and/or wearable by a user. Optical measurement systems that may be used in connection with the embodiments described herein are described more fully in U.S. patent application Ser. No. 17/176,315, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,309, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,460, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,470, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,487, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,539, filed Feb. 16, 2021; U.S. patent application Ser. No. 17/176,560, filed Feb. 16, 2021; and U.S. patent application Ser. No. 17/176,466, filed Feb. 16, 2021, which applications are incorporated herein by reference in their entirety.

In some examples, optical measurement operations performed by optical measurement system 100 are associated with a time domain-based optical measurement technique. Example time domain-based optical measurement techniques include, but are not limited to, time-correlated single-photon counting (TCSPC), time domain near infrared spectroscopy (TD-NIRS), time domain diffusive correlation spectroscopy (TD-DCS), and time domain Digital Optical Tomography (TD-DOT). For example, TCSPC detects single photons and measures a time of arrival of the photons with respect to a reference signal (e.g., a light source). By repeating the light pulses, TCSPC may accumulate a sufficient number of photon events to statistically determine a histogram representing the distribution of detected photons. Based on the histogram of photon distribution, the response of tissue to light pulses may be determined in order to study the detected neural activity and/or other attributes of the brain.

As shown, optical measurement system 100 includes a detector 104 that includes a plurality of individual photodetectors (e.g., photodetector 106), a processor 108 coupled to detector 104, a light source 110, a controller 112, and optical conduits 114 and 116 (e.g., light pipes). However, one or more of these components may not, in certain embodiments, be considered to be a part of optical measurement system 100. For example, in implementations where optical measurement system 100 is wearable by a user, processor 108 and/or controller 112 may in some embodiments be separate from optical measurement system 100 and not configured to be worn by the user.

Detector 104 may include any number of photodetectors 106 as may serve a particular implementation, such as 2^(n) photodetectors (e.g., 256, 512, . . . , 16384, etc.), where n is an integer greater than or equal to one (e.g., 4, 5, 8, 10, 11, 14, etc.). Photodetectors 106 may be arranged in any suitable manner.

Photodetectors 106 may each be implemented by any suitable circuit configured to detect individual photons of light incident upon photodetectors 106. For example, each photodetector 106 may be implemented by a single photon avalanche diode (SPAD) circuit and/or other circuitry as may serve a particular implementation.

Processor 108 may be implemented by one or more physical processing (e.g., computing) devices. In some examples, processor 108 may execute instructions (e.g., software) configured to perform one or more of the operations described herein.

Light source 110 may be implemented by any suitable component configured to generate and emit light. For example, light source 110 may be implemented by one or more laser diodes, distributed feedback (DFB) lasers, super luminescent diodes (SLDs), light emitting diodes (LEDs), diode-pumped solid-state (DPSS) lasers, super luminescent light emitting diodes (sLEDs), vertical-cavity surface-emitting lasers (VCSELs), titanium sapphire lasers, micro light emitting diode (mLEDs), and/or any other suitable laser or light source. In some examples, the light emitted by light source 110 is high coherence light (e.g., light that has a coherence length of at least 5 centimeters) at a predetermined center wavelength.

Light source 110 is controlled by controller 112, which may be implemented by any suitable computing device (e.g., processor 108), integrated circuit, and/or combination of hardware and/or software as may serve a particular implementation. In some examples, controller 112 is configured to control light source 110 by turning light source 110 on and off and/or setting an intensity of light generated by light source 110. Controller 112 may be manually operated by a user, or may be programmed to control light source 110 automatically.

Light emitted by light source 110 may travel via an optical conduit 114 (e.g., a light pipe, a light guide, a waveguide, a single-mode optical fiber, and/or or a multi-mode optical fiber) to body 102 of a subject. In cases where optical conduit 114 is implemented by a light guide, the light guide may be spring loaded and/or have a cantilever mechanism to allow for conformably pressing the light guide firmly against body 102.

Body 102 may include any suitable turbid medium. For example, in some implementations, body 102 is a head or any other body part of a human or other animal. Alternatively, body 102 may be a non-living object. For illustrative purposes, it will be assumed in the examples provided herein that body 102 is a human head.

As indicated by arrow 120, the light emitted by light source 110 enters body 102 at a first location 122 on body 102. Accordingly, a distal end of optical conduit 114 may be positioned at (e.g., right above or physically attached to) first location 122 (e.g., to a scalp of the subject). In some examples, the light may emerge from optical conduit 114 and spread out to a certain spot size on body 102 to fall under a predetermined safety limit.

As used herein, “distal” means nearer, along the optical path of the light emitted by light source 110 or the light received by detector 104, to the target (e.g., within body 102) than to light source 110 or detector 104. Thus, the distal end of optical conduit 114 is nearer to body 102 than to light source 110, and the distal end of optical conduit 116 is nearer to body 102 than to detector 104. Additionally, as used herein, “proximal” means nearer, along the optical path of the light emitted by light source 110 or the light received by detector 104, to light source 110 or detector 104 than to body 102. Thus, the proximal end of optical conduit 114 is nearer to light source 110 than to body 102, and the proximal end of optical conduit 116 is nearer to detector 104 than to body 102.

As shown, the distal end of optical conduit 116 (e.g., a light pipe, a single-mode optical fiber, and/or or a multi-mode optical fiber) is positioned at (e.g., right above or physically attached to) output location 126 on body 102. In this manner, optical conduit 116 may collect light 124 as it exits body 102 at location 126 and carry the light to detector 104. The light may pass through one or more lenses and/or other optical elements (not shown) that direct the light onto each of the photodetectors 106 included in detector 104.

Photodetectors 106 may be connected in parallel in detector 104. An output of each of photodetectors 106 may be accumulated to generate an accumulated output of detector 104. Processor 108 may receive the accumulated output and determine, based on the accumulated output, a temporal distribution of photons detected by photodetectors 106. Processor 108 may then generate, based on the temporal distribution, a histogram representing a light pulse response of a target (e.g., brain tissue, blood flow, etc.) in body 102. Example embodiments of accumulated outputs are described herein.

FIG. 2 illustrates an exemplary detector architecture 200 that may be used in accordance with the systems and methods described herein. As shown, architecture 200 includes a SPAD circuit 202 that implements photodetector 106, a control circuit 204, a time-to-digital converter (TDC) 206, and a signal processing circuit 208. Architecture 200 may include additional or alternative components as may serve a particular implementation.

In some examples, SPAD circuit 202 includes a SPAD and a fast gating circuit configured to operate together to detect a photon incident upon the SPAD. As described herein, SPAD circuit 202 may generate an output when SPAD circuit 202 detects a photon.

The fast gating circuit included in SPAD circuit 202 may be implemented in any suitable manner. For example, the fast gating circuit may include a capacitor that is pre-charged with a bias voltage before a command is provided to arm the SPAD. Gating the SPAD with a capacitor instead of with an active voltage source, such as is done in some conventional SPAD architectures, has a number of advantages and benefits. For example, a SPAD that is gated with a capacitor may be armed practically instantaneously compared to a SPAD that is gated with an active voltage source. This is because the capacitor is already charged with the bias voltage when a command is provided to arm the SPAD. This is described more fully in U.S. Pat. Nos. 10,158,038 and 10,424,683, which are incorporated herein by reference in their entireties.

In some alternative configurations, SPAD circuit 202 does not include a fast gating circuit. In these configurations, the SPAD included in SPAD circuit 202 may be gated in any suitable manner or be configured to operate in a free running mode with passive quenching.

Control circuit 204 may be implemented by an application specific integrated circuit (ASIC) or any other suitable circuit configured to control an operation of various components within SPAD circuit 202. For example, control circuit 204 may output control logic that puts the SPAD included in SPAD circuit 202 in either an armed or a disarmed state.

In some examples, control circuit 204 may control a gate delay, which specifies a predetermined amount of time control circuit 204 is to wait after an occurrence of a light pulse (e.g., a laser pulse) to put the SPAD in the armed state. To this end, control circuit 204 may receive light pulse timing information, which indicates a time at which a light pulse occurs (e.g., a time at which the light pulse is applied to body 102). Control circuit 204 may also control a programmable gate width, which specifies how long the SPAD is kept in the armed state before being disarmed.

Control circuit 204 is further configured to control signal processing circuit 208. For example, control circuit 204 may provide histogram parameters (e.g., time bins, number of light pulses, type of histogram, etc.) to signal processing circuit 208. Signal processing circuit 208 may generate histogram data in accordance with the histogram parameters. In some examples, control circuit 204 is at least partially implemented by controller 112.

TDC 206 is configured to measure a time difference between an occurrence of an output pulse generated by SPAD circuit 202 and an occurrence of a light pulse. To this end, TDC 206 may also receive the same light pulse timing information that control circuit 204 receives. TDC 206 may be implemented by any suitable circuitry as may serve a particular implementation.

Signal processing circuit 208 is configured to perform one or more signal processing operations on data output by TDC 206. For example, signal processing circuit 208 may generate histogram data based on the data output by TDC 206 and in accordance with histogram parameters provided by control circuit 204. To illustrate, signal processing circuit 208 may generate, store, transmit, compress, analyze, decode, and/or otherwise process histograms based on the data output by TDC 206. In some examples, signal processing circuit 208 may provide processed data to control circuit 204, which may use the processed data in any suitable manner. In some examples, signal processing circuit 208 is at least partially implemented by processor 108.

In some examples, each photodetector 106 (e.g., SPAD circuit 202) may have a dedicated TDC 206 associated therewith. For example, for an array of N photodetectors 106, there may be a corresponding array of N TDCs 206. Alternatively, a single TDC 206 may be associated with multiple photodetectors 106. Likewise, a single control circuit 204 and a single signal processing circuit 208 may be provided for a one or more photodetectors 106 and/or TDCs 206.

FIG. 3 illustrates an exemplary timing diagram 300 for performing an optical measurement operation using optical measurement system 100. Optical measurement system 100 may be configured to perform the optical measurement operation by directing light pulses (e.g., laser pulses) toward a target within a body (e.g., body 102). The light pulses may be short (e.g., 10-2000 picoseconds (ps)) and repeated at a high frequency (e.g., between 100,000 hertz (Hz) and 100 megahertz (MHz)). The light pulses may be scattered by the target and then detected by optical measurement system 100. Optical measurement system 100 may measure a time relative to the light pulse for each detected photon. By counting the number of photons detected at each time relative to each light pulse repeated over a plurality of light pulses, optical measurement system 100 may generate a histogram that represents a light pulse response of the target (e.g., a temporal point spread function (TPSF)). The terms histogram and TPSF are used interchangeably herein to refer to a light pulse response of a target.

For example, timing diagram 300 shows a sequence of light pulses 302 (e.g., light pulses 302-1 and 302-2) that may be applied to the target (e.g., tissue within a brain of a user, blood flow, a fluorescent material used as a probe in a body of a user, etc.). Timing diagram 300 also shows a pulse wave 304 representing predetermined gated time windows (also referred as gated time periods) during which photodetectors 106 are gated ON to detect photons. Referring to light pulse 302-1, light pulse 302-1 is applied at a time to. At a time t₁, a first instance of the predetermined gated time window begins. Photodetectors 106 may be armed at time t₁, enabling photodetectors 106 to detect photons scattered by the target during the predetermined gated time window. In this example, time t₁ is set to be at a certain time after time to, which may minimize photons detected directly from the laser pulse, before the laser pulse reaches the target. However, in some alternative examples, time t₁ is set to be equal to time to.

At a time t₂, the predetermined gated time window ends. In some examples, photodetectors 106 may be disarmed at time t₂. In other examples, photodetectors 106 may be reset (e.g., disarmed and re-armed) at time t₂ or at a time subsequent to time t₂. During the predetermined gated time window, photodetectors 106 may detect photons scattered by the target. Photodetectors 106 may be configured to remain armed during the predetermined gated time window such that photodetectors 106 maintain an output upon detecting a photon during the predetermined gated time window. For example, a photodetector 106 may detect a photon at a time t3, which is during the predetermined gated time window between times t₁ and t₂. The photodetector 106 may be configured to provide an output indicating that the photodetector 106 has detected a photon. The photodetector 106 may be configured to continue providing the output until time t₂, when the photodetector may be disarmed and/or reset. Optical measurement system 100 may generate an accumulated output from the plurality of photodetectors. Optical measurement system 100 may sample the accumulated output to determine times at which photons are detected by photodetectors 106 to generate a TPSF.

As mentioned, in some alternative examples, photodetector 106 may be configured to operate in a free-running mode such that photodetector 106 is not actively armed and disarmed (e.g., at the end of each predetermined gated time window represented by pulse wave 304). In contrast, while operating in the free-running mode, photodetector 106 may be configured to reset within a configurable time period after an occurrence of a photon detection event (i.e., after photodetector 106 detects a photon) and immediately begin detecting new photons. However, only photons detected within a desired time window (e.g., during each gated time window represented by pulse wave 304) may be included in the TPSF.

FIG. 4 illustrates a graph 400 of an exemplary TPSF 402 that may be generated by optical measurement system 100 in response to a light pulse 404 (which, in practice, represents a plurality of light pulses). Graph 400 shows a normalized count of photons on a y-axis and time bins on an x-axis. As shown, TPSF 402 is delayed with respect to a temporal occurrence of light pulse 404. In some examples, the number of photons detected in each time bin subsequent to each occurrence of light pulse 404 may be aggregated (e.g., integrated) to generate TPSF 402. TPSF 402 may be analyzed and/or processed in any suitable manner to determine or infer detected neural activity.

Optical measurement system 100 may be implemented by or included in any suitable device. For example, optical measurement system 100 may be included, in whole or in part, in a non-invasive wearable device (e.g., a headpiece) that a user may wear to perform one or more diagnostic, imaging, analytical, and/or consumer-related operations. The non-invasive wearable device may be placed on a user's head or other part of the user to detect neural activity. In some examples, such neural activity may be used to make behavioral and mental state analysis, awareness and predictions for the user.

Mental state described herein refers to the measured neural activity related to physiological brain states and/or mental brain states, e.g., joy, excitement, relaxation, surprise, fear, stress, anxiety, sadness, anger, disgust, contempt, contentment, calmness, focus, attention, approval, creativity, positive or negative reflections/attitude on experiences or the use of objects, etc. Further details on the methods and systems related to a predicted brain state, behavior, preferences, or attitude of the user, and the creation, training, and use of neuromes can be found in U.S. Provisional Patent Application No. 63/047,991, filed Jul. 3, 2020. Exemplary measurement systems and methods using biofeedback for awareness and modulation of mental state are described in more detail in U.S. patent application Ser. No. 16/364,338, filed Mar. 26, 2019, published as US2020/0196932A1. Exemplary measurement systems and methods used for detecting and modulating the mental state of a user using entertainment selections, e.g., music, film/video, are described in more detail in U.S. patent application Ser. No. 16/835,972, filed Mar. 31, 2020, published as US2020/0315510A1. Exemplary measurement systems and methods used for detecting and modulating the mental state of a user using product formulation from, e.g., beverages, food, selective food/drink ingredients, fragrances, and assessment based on product-elicited brain state measurements are described in more detail in U.S. patent application Ser. No. 16/853,614, filed Apr. 20, 2020, published as US2020/0337624A1. Exemplary measurement systems and methods used for detecting and modulating the mental state of a user through awareness of priming effects are described in more detail in U.S. patent application Ser. No. 16/885,596, filed May 28, 2020, published as US2020/0390358A1. These applications and corresponding U.S. publications are incorporated herein by reference in their entirety.

FIG. 5 shows an exemplary non-invasive wearable brain interface system 500 (“brain interface system 500”) that implements optical measurement system 100 (shown in FIG. 1 ). As shown, brain interface system 500 includes a head-mountable component 502 configured to be attached to a user's head. Head-mountable component 502 may be implemented by a cap shape that is worn on a head of a user. Alternative implementations of head-mountable component 502 include helmets, beanies, headbands, other hat shapes, or other forms conformable to be worn on a user's head, etc. Head-mountable component 502 may be made out of any suitable cloth, soft polymer, plastic, hard shell, and/or any other suitable material as may serve a particular implementation. Examples of headgears used with wearable brain interface systems are described more fully in U.S. Pat. No. 10,340,408, incorporated herein by reference in its entirety.

Head-mountable component 502 includes a plurality of detectors 504, which may implement or be similar to detector 104, and a plurality of light sources 506, which may be implemented by or be similar to light source 110. It will be recognized that in some alternative embodiments, head-mountable component 502 may include a single detector 504 and/or a single light source 506.

Brain interface system 500 may be used for controlling an optical path to the brain and for transforming photodetector measurements into an intensity value that represents an optical property of a target within the brain. Brain interface system 500 allows optical detection of deep anatomical locations beyond skin and bone (e.g., skull) by extracting data from photons originating from light source 506 and emitted to a target location within the user's brain, in contrast to conventional imaging systems and methods (e.g., optical coherence tomography (OCT)), which only image superficial tissue structures or through optically transparent structures.

Brain interface system 500 may further include a processor 508 configured to communicate with (e.g., control and/or receive signals from) detectors 504 and light sources 506 by way of a communication link 510. Communication link 510 may include any suitable wired and/or wireless communication link. Processor 508 may include any suitable housing and may be located on the user's scalp, neck, shoulders, chest, or arm, as may be desirable. In some variations, processor 508 may be integrated in the same assembly housing as detectors 504 and light sources 506.

As shown, brain interface system 500 may optionally include a remote processor 512 in communication with processor 508. For example, remote processor 512 may store measured data from detectors 504 and/or processor 508 from previous detection sessions and/or from multiple brain interface systems (not shown). Power for detectors 504, light sources 506, and/or processor 508 may be provided via a wearable battery (not shown). In some examples, processor 508 and the battery may be enclosed in a single housing, and wires carrying power signals from processor 508 and the battery may extend to detectors 504 and light sources 506. Alternatively, power may be provided wirelessly (e.g., by induction).

In some alternative embodiments, head mountable component 502 does not include individual light sources. Instead, a light source configured to generate the light that is detected by detector 504 may be included elsewhere in brain interface system 500. For example, a light source may be included in processor 508 and coupled to head mountable component 502 through optical connections.

Optical measurement system 100 may alternatively be included in a non-wearable device (e.g., a medical device and/or consumer device that is placed near the head or other body part of a user to perform one or more diagnostic, imaging, and/or consumer-related operations). Optical measurement system 100 may alternatively be included in a sub-assembly enclosure of a wearable invasive device (e.g., an implantable medical device for brain recording and imaging).

Optical measurement system 100 may be modular in that one or more components of optical measurement system 100 may be removed, changed out, or otherwise modified as may serve a particular implementation. Additionally or alternatively, optical measurement system 100 may be modular such that one or more components of optical measurement system 100 may be housed in a separate housing (e.g., module) and/or may be movable relative to other components. Exemplary modular multimodal measurement systems are described in more detail in U.S. patent application Ser. No. 17/176,460, filed Feb. 16, 2021, U.S. patent application Ser. No. 17/176,470, filed Feb. 16, 2021, U.S. patent application Ser. No. 17/176,487, filed Feb. 16, 2021, U.S. Provisional Patent Application No. 63/038,481, filed Jun. 12, 2020, and U.S. patent application Ser. No. 17/176,560, filed Feb. 16, 2021, which applications are incorporated herein by reference in their respective entireties.

To illustrate, FIG. 6 shows an exemplary wearable module assembly 600 (“assembly 600”) that implements one or more of the optical measurement features described herein. Assembly 600 may be worn on the head or any other suitable body part of the user. As shown, assembly 600 may include a plurality of modules 602 (e.g., modules 602-1 through 602-3). While three modules 602 are shown to be included in assembly 600 in FIG. 6 , in alternative configurations, any number of modules 602 (e.g., a single module up to sixteen or more modules) may be included in assembly 600. Moreover, while modules 602 are shown to be adjacent to and touching one another, modules 602 may alternatively be spaced apart from one another (e.g., in implementations where modules 602 are configured to be inserted into individual slots or cutouts of the headgear). Moreover, while modules 602 are shown to have a hexagonal shape, modules 602 may alternatively have any other suitable geometry (e.g., in the shape of a pentagon, octagon, square, rectangular, circular, triangular, free-form, etc.). Assembly 600 may conform to three-dimensional surface geometries, such as a user's head. Exemplary wearable module assemblies comprising a plurality of wearable modules are described in more detail in U.S. Provisional Patent Application No. 62/992,550, filed Mar. 20, 2020, and U.S. Provisional Patent Application No. 63/038,458, filed Jun. 12, 2020, which applications are incorporated herein by reference in their respective entireties.

The wearable module assembly 600 may also conform to three-dimensional surface geometries, such as a user's head. Exemplary wearable module assemblies comprising a plurality of wearable modules are described in more detail in U.S. Provisional Patent Application No. 62/992,550, filed Mar. 20, 2020, which application is incorporated herein by reference in its entirety.

Each module 602 includes a source 604 and a plurality of detectors 606 (e.g., detectors 606-1 through 606-6). Source 604 may be implemented by one or more light sources similar to light source 110. Each detector 606 may implement or be similar to detector 104 and may include a plurality of photodetectors (e.g., SPADs) as well as other circuitry (e.g., TDCs). As shown, detectors 606 are arranged around and substantially equidistant from source 604. In other words, the spacing between a light source (i.e., a distal end portion of a light source optical conduit) and the detectors (i.e., distal end portions of optical conduits for each detector) are maintained at the same fixed distance on each module to ensure homogeneous coverage over specific areas and to facilitate processing of the detected signals. The fixed spacing also provides consistent spatial (lateral and depth) resolution across the target area of interest, e.g., brain tissue. Moreover, maintaining a known distance between the light emitter and the detector allows subsequent processing of the detected signals to infer spatial (e.g., depth localization, inverse modeling) information about the detected signals. Detectors 606 may be alternatively disposed as may serve a particular implementation. Exemplary wearable module assemblies with integrated detectors and other module components are described in more detail in U.S. Provisional Patent Application No. 63/038,458, filed Jun. 12, 2020, which application is incorporated herein by reference in its entirety.

FIG. 7 shows an exemplary configuration 700 of components of an optical measurement system (e.g., optical measurement system 100). Configuration 700 shows modules 602 (e.g., modules 602-1 through 602-3, shown in FIG. 6 ) in an implementation where modules 602 are configured to be inserted into individual slots 702 (e.g., slots 702-1 through 702-4) of a wearable device (e.g., head-mountable component 502 shown in FIG. 5 or any other suitable component configured to be worn by a user). While configuration 700 shows three modules 602 in four slots 702, any suitable number of modules and slots may be included in configuration 700.

Configuration 700 also includes a processor 704 (e.g., an implementation of processor 108 and/or processor 508) that is configured to communicate with modules 602 via slot interfaces 706 (e.g., slot interfaces 706-1 through 706-4) of each slot 702. Configuration 700 also shows modules 602 each including a control circuit 708 (e.g., control circuits 708-1 through 708-3) configured to communicate with processor 704. Configuration 700 also includes a communication bus 710 through which processor 704 may transmit and receive data (e.g., signals, messages, commands, information, etc.) to and from modules 602.

Optical measurement system 100 may be configured to be a modular system, such that modules 602 may be interchangeable in slots 702. For example, in configuration 700, module 602-1 is located in slot 702-1, module 602-2 is located in slot 702-3, and module 602-3 is located in slot 702-4. In other configurations, each of modules 602 may be located in different slots 702, fewer modules may be located in slots 702, or more modules may be located in slots 702. To illustrate, a user may rearrange modules 602 such that they are located in different slots 702. For example, the user may place module 602-1 in slot 702-2 instead of in slot 702-1.

Processor 704 may be configured to determine which modules 602 are located in which slots 702 so that processor 704 may communicate individually with each of modules 602 and/or each of detectors 606 of modules 602. Furthermore, processor 704 may be configured to assign address identifiers to each of detectors 606 so that processor 704 may transmit data to and/or receive data from specific detectors 606. As communication bus 710 may, in some examples, be configured as a shared communication bus through which slot interfaces 706 are connected serially to processor 704, such address identifiers may enable processor 704 to specify detectors 606 for transmitting data and identify from which of detectors 606 data is received.

For instance, processor 704 may perform an enumeration process (e.g., during a startup phase) for enumerating modules 602 and/or detectors 606. During the enumeration process, processor 704 may successively transmit a command (also referred to herein as an “enable command”) to each slot included in slots 702 to enable a respective module 602 located at that slot if the slot is housing a module. For example, processor 704 may first transmit the enable command to slot 702-1. As module 602-1 is located at slot 702-1, module 602-1 may be enabled in response to the command. Processor 704 may then transmit the enable command to slot 702-2. However, as shown in the particular example of FIG. 7 , there is no module at slot 702-2 in configuration 700, therefore, no module would be enabled. Processor 704 may then transmit the enable command to slot 702-3. As module 602-2 is located at slot 702-3, module 602-2 may be enabled in response to the command. Processor 704 may similarly successively transmit the enable command to the remainder of slots 702.

If a module is located at a slot when processor 704 transmits the enable command to the slot, a control circuit of the module may transmit an acknowledgement (e.g., an acknowledgement signal) back to processor 704, thereby indicating that the module is located at the slot and that the module has been enabled. For instance, in response to the enable command transmitted by processor 704 to slot 702-1, control circuit 708-1 of module 602-1 may transmit an acknowledgment to processor 704 indicating that module 602-1 is located at slot 702-1 and enabled. Based on the acknowledgement, processor 704 may determine that module 602-1 is located at slot 702-1.

Once processor 704 determines that module 602-1 is located at slot 702-1, processor 704 may successively transmit a plurality of detector address identifiers that are to be assigned to each detector 606 of module 602-1. This transmission may be performed in any suitable manner. For example, as described in more detail below, processor 704 may transmit the detector address identifiers by broadcasting the detector address identifiers by way of communication bus 710 to all of slots 702.

Each detector address identifier transmitted by processor 704 may be based on a slot location of slot 702-1 and a detector location on module 602. As modules 602 each include six detectors in this example, detector address identifiers may be 0101 (for slot 1, detector 1), 0102, 0103, 0104, 0105, and 0106 for detectors 606-1 through 606-6, respectively. Any other suitable addresses/addressing scheme may be used.

Concurrent with the transmission of the detector address identifiers, control circuit 708-1 may direct each of detectors 606 to successively be placed in an enumeration mode in which each detector 606 is assigned a different detector address identifier of the detector address identifiers. As communication bus 710 may be a shared communication bus and detectors 606 have yet to be assigned addresses for direct communication, processor 704 may transmit the detector address identifiers by broadcasting the detector address identifiers on communication bus 710. Thus, any of detectors 606 that are in the enumeration mode may receive the detector address identifier being broadcast and be assigned the detector address identifier. Control circuit 708-1 may therefore coordinate with processor 704 such that a correct detector 606 is in the enumeration mode while processor 704 is broadcasting a corresponding detector address identifier.

For example, control circuit 708-1 may place detector 606-1 in the enumeration mode while processor 704 is transmitting detector address identifier 0101. Detector 606-1 may accordingly be assigned detector address identifier 0101. For instance, detector 606-1 may store the detector address identifier in a memory of detector 606-1 and may respond to commands received that include the detector address identifier. Detector 606-1 may also include the detector address identifier in messages transmitted by detector 606-1.

After detector 606-1 has been assigned a detector address identifier, control circuit 708-1 may place detector 606-2 in the enumeration mode while processor 704 is transmitting detector address identifier 0102, and so forth with detectors 606-3 through 606-6. This coordination of placing detectors in the enumeration mode by control circuit 708-1 while a corresponding detector address identifier is broadcast by processor 704 may be implemented in any suitable manner. For instance, processor 704 and control circuit 708-1 may use a predetermined time period for each detector 606 to be placed successively in the enumeration mode as processor 704 successively transmits the detector address identifiers. Additionally or alternatively, control circuit 708-1 and/or detectors 606 may transmit an acknowledgment and/or other messages to processor 704 once a particular detector address identifier is assigned to a detector 600 so that processor 704 may transmit a next detector address identifier for a next detector 606. Any other suitable coordination scheme may be used.

Once detectors 606-1 through 606-6 on module 602-1 have been assigned detector address identifiers, processor 704 may transmit an enable command to a next slot 702-2. As described, as there is no module located in slot 702-2 in the particular example of FIG. 7 , processor 704 may receive no acknowledgment to the enable command. Based on the absence of the acknowledgment, processor 704 may determine that no module is located in slot 702-2.

Processor 704 may then transmit an enable command to a next slot 702-3. Control circuit 708-2 may receive the command to enable module 602-2 and the enumeration process may be performed for detectors on module 602-2 as described with module 602-1. The process may be repeated successively for each module 602 at each slot 702. As a result, processor 704 may determine which of slots 702 have modules 602 and also may assign each detector 606 on each module 602 a unique detector address identifier.

In some examples, upon receiving an enable command, a control circuit (e.g., control circuit 708-1) of a module (e.g., module 602-1) may transmit (in addition to or as the acknowledgment) information associated with the module, such as a module identifier (e.g., a serial number of the module and/or any other identifying information or other information associated with the module). Processor 704 may receive such information and base the detector address identifiers on the information.

Additionally or alternatively, detector address identifiers may be based on predetermined slot address identifiers. Slot address identifiers may be assigned in any suitable manner, such as an order on communication bus 710 from processor 704, a location or area on a body of a user for which each slot 702 on the wearable device is configured to be proximate to, etc. In some examples, slots 702 may be configured to house modules 602 in a predetermined orientation (e.g., based on a connection port location, using keyed modules, etc.). Detector address identifiers may thus be further based on a location or position of detector 606 on module 602 and/or a more specific location or area on the body of the user to which detector 606 is configured to be proximate.

In some examples, processor 704 may transmit additional setup information in addition to the detector address identifier to each detector in the enumeration mode. For instance, processor 704 may transmit data representative of a communication mode (e.g., a serial peripheral interface (SPI) mode, etc.) that is to be used for a duration of a session, e.g., a module calibration session, a module testing session, photon detection session when a user is wearing the non-invasive wearable brain interface system 500, or any other type of session when using, testing, or calibrating the non-invasive wearable brain interface system 500. Any other suitable setup information may be provided by processor 704 to each detector in the enumeration mode.

FIG. 8 shows another exemplary configuration 800 that may be an implementation of configuration 700 shown in FIG. 7 . Configuration 800 shows modules 802 (e.g., module 802-1 through 802-N) configured to be housed in slots (e.g., slots 702) of a wearable device. Modules 802 may be similar to modules 602 as described in connection with FIGS. 6 and 7 .

As shown, module 802-2 includes a plurality of detectors 804 (e.g., detectors 804-1 through 804-N). Each detector 804 may be similar to detectors 606 as described in connection with FIGS. 6 and 7 . Though not shown, other modules 802 may also include a plurality of detectors.

Each module 802 may also include an input/output (I/O) expander 806 (e.g., I/O expander 806-1 through 806-N). Each I/O expander 806 may be an implementation of control circuit 708 or a portion of control circuit 708. Each I/O expander 806 may be configured to communicate with a processor (e.g., processor 704, not shown in FIG. 8 ) via a harness connector 808 (e.g., harness connectors 808-1 through 808-N) and a board scan chain element 810 (e.g., board scan chain element 810-1 through 810-N), which may implement slot interface 706.

In configuration 800, processor 704 may successively transmit the enable command to each slot 702 by utilizing a scan chain configured to successively enable a respective I/O expander 806 via a respective board scan chain element 810 for each slot 702 if a module is located at the slot. Each board scan chain element 810 receives a scan input 812 from a previous board scan chain element in the scan chain (e.g., board scan chain element 810-2 receives scan input 812 from board scan chain element 810-1) and provides a scan output 814 to a next board scan chain element (e.g., board scan chain element 810-3 (not shown)) in the scan chain.

Board scan chain element 810 further receives a scan clock signal 816. Based on scan input 812, scan output 814, and scan clock signal 816, the scan chain enables each I/O expander 806 of each module 802 successively in each slot 702.

For instance, when I/O expander 806-2 is enabled, I/O expander 806-2 may communicate with processor 704 via a shared enumeration bus 818 (e.g., a sideband channel of communication bus 710, a separate shared communication bus, or any other suitable implementation) to coordinate enabling of detectors 804 to receive detector address identifiers. As I/O expander 806-2 receives signals from processor 704, I/O expander 806-2 is configured to provide signals to each of detectors 804 to successively enable each detector 804. When a detector 804 (e.g., detector 804-1) is enabled, the detector 804 may communicate with processor 704 via a shared data bus 820 (e.g., a main channel of communication bus 710, a separate shared communication bus, or any other suitable implementation) to receive the detector address identifier being broadcast by processor 704. As described, I/O expander 806-2 may coordinate with processor 704 such that each of detectors 804 are successively placed in an enumeration mode to be assigned a corresponding detector address identifier of a plurality of detector address identifiers successively broadcast on shared data bus 820.

Once detectors 804 are assigned detector address identifiers, processor 704 may communicate individually with specific detectors 804 via shared data bus 820 by addressing messages with the detector address identifier of the specific detector 804. Messages received by processor 704 via shared data bus 820 may also include specific detector address identifiers so that processor 704 may identify which detector 804 transmitted the messages.

In some examples, processor 704 may be configured to continue broadcasting certain messages to all detectors 804 using a particular broadcast address (e.g., all zeros (0) or any other suitable broadcast address). Additionally or alternatively, processor 704 may be configured to send messages to groups of detectors (e.g., all detectors on a specific module, all detectors in a specific area or region, etc.) using particular addresses and/or portions of addresses. For instance, detectors 804 on module 802-2 may all begin with a specific number or set of numbers that indicate that the detectors are on module 802-2. A message for all detectors on module 802-2 may then, for instance, include an address that starts with the specific number or set of numbers followed by all zeros (0). Any other suitable message addressing schemes may be used to communicate with detectors 804 and/or modules 802.

FIGS. 9-14 illustrate embodiments of a wearable device 900 that includes elements of the optical detection systems described herein. In particular, the wearable devices 900 shown in FIGS. 9-14 include a plurality of modules 902, similar to the modules shown in FIG. 6 as described herein. For example, each module 902 includes a source 604 and a plurality of detectors 606 (e.g., detectors 606-1 through 606-6). Source 604 may be implemented by one or more light sources similar to light source 110. Each detector 606 may implement or be similar to detector 104 and may include a plurality of photodetectors. The wearable devices 900 may each also include a controller (e.g., controller 112) and a processor (e.g., processor 108) and/or be communicatively connected to a controller and processor. In general, wearable device 900 may be implemented by any suitable headgear and/or clothing article configured to be worn by a user. The headgear and/or clothing article may include batteries, cables, and/or other peripherals for the components of the optical measurement systems described herein.

FIG. 9 illustrates an embodiment of a wearable device 900 in the form of a helmet with a handle 904. A cable 906 extends from the wearable device 900 for attachment to a battery or hub (with components such as a processor or the like). FIG. 10 illustrates another embodiment of a wearable device 900 in the form of a helmet showing a back view. FIG. 11 illustrates a third embodiment of a wearable device 900 in the form of a helmet with the cable 906 leading to a wearable garment 908 (such as a vest or partial vest) that can include a battery or a hub. Alternatively or additionally, the wearable device 900 can include a crest 910 or other protrusion for placement of the hub or battery.

FIG. 12 illustrates another embodiment of a wearable device 900 in the form of a cap with a wearable garment 908 in the form of a scarf that may contain or conceal a cable, battery, and/or hub. FIG. 13 illustrates additional embodiments of a wearable device 900 in the form of a helmet with a one-piece scarf 908 or two-piece scarf 908-1. FIG. 14 illustrates an embodiment of a wearable device 900 that includes a hood 910 and a beanie 912 which contains the modules 902, as well as a wearable garment 908 that may contain a battery or hub.

In some examples, a non-transitory computer-readable medium storing computer-readable instructions may be provided in accordance with the principles described herein. The instructions, when executed by a processor of a computing device, may direct the processor and/or computing device to perform one or more operations, including one or more of the operations described herein. Such instructions may be stored and/or transmitted using any of a variety of known computer-readable media.

A non-transitory computer-readable medium as referred to herein may include any non-transitory storage medium that participates in providing data (e.g., instructions) that may be read and/or executed by a computing device (e.g., by a processor of a computing device). For example, a non-transitory computer-readable medium may include, but is not limited to, any combination of non-volatile storage media and/or volatile storage media. Exemplary non-volatile storage media include, but are not limited to, read-only memory, flash memory, a solid-state drive, a magnetic storage device (e.g. a hard disk, a floppy disk, magnetic tape, etc.), ferroelectric random-access memory (“RAM”), and an optical disc (e.g., a compact disc, a digital video disc, a Blu-ray disc, etc.). Exemplary volatile storage media include, but are not limited to, RAM (e.g., dynamic RAM).

FIG. 15 illustrates an exemplary computing device 1500 that may be specifically configured to perform one or more of the processes described herein. Any of the systems, units, computing devices, and/or other components described herein may be implemented by computing device 1500.

As shown in FIG. 15 , computing device 1500 may include a communication interface 1502, a processor 1504, a storage device 1506, and an input/output (“I/O”) module 1508 communicatively connected one to another via a communication infrastructure 1510. While an exemplary computing device 1500 is shown in FIG. 15 , the components illustrated in FIG. 15 are not intended to be limiting. Additional or alternative components may be used in other embodiments. Components of computing device 1500 shown in FIG. 15 will now be described in additional detail.

Communication interface 1502 may be configured to communicate with one or more computing devices. Examples of communication interface 1502 include, without limitation, a wired network interface (such as a network interface card), a wireless network interface (such as a wireless network interface card), a modem, an audio/video connection, and any other suitable interface.

Processor 1504 generally represents any type or form of processing unit capable of processing data and/or interpreting, executing, and/or directing execution of one or more of the instructions, processes, and/or operations described herein. Processor 1504 may perform operations by executing computer-executable instructions 1512 (e.g., an application, software, code, and/or other executable data instance) stored in storage device 1506.

Storage device 1506 may include one or more data storage media, devices, or configurations and may employ any type, form, and combination of data storage media and/or device. For example, storage device 1506 may include, but is not limited to, any combination of the non-volatile media and/or volatile media described herein. Electronic data, including data described herein, may be temporarily and/or permanently stored in storage device 1506. For example, data representative of computer-executable instructions 1512 configured to direct processor 1504 to perform any of the operations described herein may be stored within storage device 1506. In some examples, data may be arranged in one or more databases residing within storage device 1506.

I/O module 1508 may include one or more I/O modules configured to receive user input and provide user output. I/O module 1508 may include any hardware, firmware, software, or combination thereof supportive of input and output capabilities. For example, I/O module 1508 may include hardware and/or software for capturing user input, including, but not limited to, a keyboard or keypad, a touchscreen component (e.g., touchscreen display), a receiver (e.g., an RF or infrared receiver), motion sensors, and/or one or more input buttons.

I/O module 1508 may include one or more devices for presenting output to a user, including, but not limited to, a graphics engine, a display (e.g., a display screen), one or more output drivers (e.g., display drivers), one or more audio speakers, and one or more audio drivers. In certain embodiments, I/O module 1508 is configured to provide graphical data to a display for presentation to a user. The graphical data may be representative of one or more graphical user interfaces and/or any other graphical content as may serve a particular implementation.

FIG. 16 illustrates an exemplary method 1600 that may be performed by processor 704 and/or any implementation thereof. While FIG. 16 illustrates exemplary operations according to one embodiment, other embodiments may omit, add to, reorder, and/or modify any of the operations shown in FIG. 16 . Each of the operations shown in FIG. 16 may be performed, or repeated as needed for each respective module located in its respective slot on the wearable device, in any of the ways described herein.

In operation 1602, a processor successively transmits, to each slot of a plurality of slots on a wearable device, a command to enable a respective module located in each slot.

In operation 1604, the processor determines, based on an acknowledgment received from a module control circuit of a first module when the command is transmitted to a first slot, that the first module is enabled and located in the first slot.

In operation 1606, the processor successively transmits, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers, each detector address identifier of the plurality of detector address identifiers transmitted while the module control circuit places a different detector of a plurality of detectors of the first module into an enumeration mode to be assigned each detector address identifier.

An exemplary optical measurement system described herein includes a processor, a wearable device comprising a plurality of slots, each slot configured to house a different module, a first module, a second module, etc. The first module includes a plurality of detectors and a module control circuit configured to communicate with the plurality of detectors and with the processor. The processor is configured to successively transmit, to each slot of the plurality of slots, a command to enable a respective module located in each slot. The processor is further configured to determine, based on an acknowledgment received from the module control circuit when the command is transmitted to a first slot, that the first module is enabled and located in the first slot. The processor is further configured to successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers. The module control circuit is configured to, while the plurality of detector address identifiers are being successively transmitted, successively place the plurality of detectors into an enumeration mode in which each detector of the plurality of detectors is assigned a different detector address identifier of the plurality of detector address identifiers.

An exemplary system described herein includes a memory storing instructions a processor communicatively coupled to the memory. The processor is configured to execute the instructions to successively transmit, to each slot of a plurality of slots on a wearable device, a command to enable a respective module located in each slot. The processor is further configured to execute the instructions to determine, based on an acknowledgment received from a module control circuit of a first module when the command is transmitted to a first slot, that the first module is enabled and located in the first slot. The processor is further configured to execute the instructions to successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers, each detector address identifier of the plurality of detector address identifiers transmitted while the module control circuit places a different detector of a plurality of detectors of the first module into an enumeration mode to be assigned each detector address identifier.

An exemplary method described herein includes successively transmitting, by a processor to each slot of a plurality of slots on a wearable device, a command to enable a respective module located in each slot. The method further includes determining, by the processor, based on an acknowledgment received from a module control circuit of a first module when the command is transmitted to a first slot, that the first module is enabled and located in the first slot. The method further includes successively transmitting, by the processor, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers, each detector address identifier of the plurality of detector address identifiers transmitted while the module control circuit places a different detector of a plurality of detectors of the first module into an enumeration mode to be assigned each detector address identifier.

In the preceding description, various exemplary embodiments have been described with reference to the accompanying drawings. It will, however, be evident that various modifications and changes may be made thereto, and additional embodiments may be implemented, without departing from the scope of the invention as set forth in the claims that follow. For example, certain features of one embodiment described herein may be combined with or substituted for features of another embodiment described herein. The description and drawings are accordingly to be regarded in an illustrative rather than a restrictive sense. 

What is claimed is:
 1. An optical measurement system comprising: a processor; a wearable device comprising a plurality of slots, each slot configured to house a different module; and a first module comprising: a plurality of detectors, and a module control circuit configured to communicate with the plurality of detectors and with the processor; wherein the processor is configured to: successively transmit, to each slot of the plurality of slots, a command to enable a respective module located in each slot, determine, based on an acknowledgment received from the module control circuit when the command is transmitted to a first slot, that the first module is enabled and located in the first slot, and successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers; and wherein, while the plurality of detector address identifiers are being successively transmitted, the module control circuit is configured to successively place the plurality of detectors into an enumeration mode in which each detector of the plurality of detectors is assigned a different detector address identifier of the plurality of detector address identifiers.
 2. The optical measurement system of claim 1, wherein the processor is further configured to determine, based on an absence of an acknowledgment received when the command is transmitted to a second slot of the plurality of slots, that no module is located in the second slot.
 3. The optical measurement system of claim 1, wherein each slot of the plurality of slots has a different predetermined slot address.
 4. The optical measurement system of claim 3, wherein the plurality of detector address identifiers are based on the different predetermined slot addresses.
 5. The optical measurement system of claim 1, wherein each detector address identifier of the plurality of detector address identifiers is broadcast to any detector in the enumeration mode.
 6. The optical measurement system of claim 5, wherein the successively placing the plurality of detectors into the enumeration mode in which each detector of the plurality of detectors is assigned to the different detector address identifier comprises enabling each detector for a time period that corresponds to when a different detector address identifier of the plurality of detector address identifiers is being broadcast such that each detector receives and stores the different detector address identifier.
 7. The optical measurement system of claim 1, wherein the module control circuit comprises an input/output (I/O) expander configured to communicate with the processor via a first shared communication bus.
 8. The optical measurement system of claim 7, wherein the command to enable the respective module located in each slot comprises a scan chain signal configured to enable the I/O expander.
 9. The optical measurement system of claim 7, wherein the plurality of detectors are configured to communicate with the processor via a second shared communication bus.
 10. The optical measurement system of claim 1, wherein the processor is further configured to transmit additional setup information to each detector in the enumeration mode.
 11. The optical measurement system of claim 1, wherein each slot of the plurality of slots is configured to house the module in a predetermined orientation.
 12. The optical measurement system of claim 1, wherein: the processor is further configured to receive, from the module control circuit, a module identifier of the first module; and the plurality of detector address identifiers are based on the module identifier.
 13. The optical measurement system of claim 1, where each detector of the plurality of detectors comprises a photodetector configured to detect a photon from a light pulse directed toward a target of a body of a user of the wearable device.
 14. The optical measurement system of claim 13, wherein the first module further comprises a light source configured to generate the light pulse.
 15. The optical measurement system of claim 13, wherein each photodetector comprises: a single photon avalanche diode (SPAD); and a fast gating circuit configured to arm and disarm the SPAD.
 16. The optical measurement system of claim 1, wherein the wearable device includes a head-mountable component configured to be worn on a head of a user.
 17. The optical measurement system of claim 1, wherein the processor is housed in the wearable device.
 18. A system comprising: a memory storing instructions; and a processor communicatively coupled to the memory and configured to execute the instructions to: successively transmit, to each slot of a plurality of slots on a wearable device, a command to enable a respective module located in each slot, determine, based on an acknowledgment received from a module control circuit of a first module when the command is transmitted to a first slot, that the first module is enabled and located in the first slot, and successively transmit, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers, each detector address identifier of the plurality of detector address identifiers transmitted while the module control circuit places a different detector of a plurality of detectors of the first module into an enumeration mode to be assigned each detector address identifier.
 19. The system of claim 18, wherein the processor is further configured to determine, based on an absence of an acknowledgment received when the command is transmitted to a second slot of the plurality of slots, that no module is located in the second slot.
 20. The system of claim 18, wherein each slot of the plurality of slots has a different predetermined slot address.
 21. The system of claim 20, wherein the plurality of detector address identifiers are based on the different predetermined slot addresses.
 22. The system of claim 18, wherein each detector address identifier of the plurality of detector address identifiers is broadcast to any detector in the enumeration mode.
 23. The system of claim 18, wherein the processor is configured to communicate with an input/output (I/O) expander of the module control circuit via a first shared communication bus.
 24. The system of claim 23, wherein the command to enable the respective module located in each slot comprises a scan chain signal configured to enable the I/O expander.
 25. The system of claim 23, wherein the processor is configured to communicate with the plurality of detectors via a second shared communication bus.
 26. The system of claim 18, wherein the processor is further configured to transmit additional setup information to each detector in the enumeration mode.
 27. The system of claim 18, wherein: the processor is further configured to receive, from the module control circuit, a module identifier of the first module; and the plurality of detector address identifiers are based on the module identifier.
 28. A method comprising: successively transmitting, by a processor to each slot of a plurality of slots on a wearable device, a command to enable a respective module located in each slot, determining, by the processor, based on an acknowledgment received from a module control circuit of a first module when the command is transmitted to a first slot, that the first module is enabled and located in the first slot, and successively transmitting, by the processor, based on the determining that the first module is enabled and located in the first slot, a plurality of detector address identifiers, each detector address identifier of the plurality of detector address identifiers transmitted while the module control circuit places a different detector of a plurality of detectors of the first module into an enumeration mode to be assigned each detector address identifier.
 29. The method of claim 28, further comprising determining, by the processor, based on an absence of an acknowledgment received when the command is transmitted to a second slot of the plurality of slots, that no module is located in the second slot. 